MOUNTAIN VIEW, Calif., Mar. 30, 2016 – Synopsys, Inc. (Nasdaq: SNPS) today announced that the company's new Custom Compiler™ tool (see today's news release) has been certified by TSMC for 10-nanometer ...

MOUNTAIN VIEW, Calif., Mar. 30, 2016 – Synopsys, Inc. (Nasdaq: SNPS) today unveiled Custom Compiler™, a new custom design solution that closes the FinFET productivity gap by shortening custom design ...

“Transistor characteristics in advanced technology nodes are strongly impacted by devices design and process integration choices. Variation in the layout and pattern configuration in close proximity ...

Company's 14nm roadmap accelerates customers' path to FinFET technology Milpitas, Calif., Sept. 20, 2012 – GLOBALFOUNDRIES today accelerated its leading-edge roadmap with the launch of a new ...

A technical paper titled “AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies” was published by researchers at UT Austin and NVIDIA. “This paper presents AutoCRAFT, an ...

Highlights: Advanced layout methodologies and simulation-driven layout improve layout productivity by up to 50% Reduces FinFET layout effort by >3X Improves Virtuoso ADE simulation throughput by up to ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ: CDNS) today introduced major enhancements to its Cadence ® Virtuoso ® custom IC design platform that improve electronic system ...

FinFET technology is seen as the answer to fabrication processes below 20 nm. However, FinFET also presents a lot of uncertainty and concern related to defect manifestation, necessary test methods, ...

Since the inception of the integrated-circuit (IC) industry, design metrics such as performance, power, area, cost, and time-to-market have remained the same. In fact, Moore’s law is all about ...