仪表网

北京量子院联合清华大学、上海交通大学研制出首款AI强化的低温CMOS ...

摘要研究团队首次将神经网络自适应片上学习机制引入超低温量子读出芯片，实现了量子比特读出阈值的动态自适应，以及读出参数漂移的实时监测与动态校准，成功研制出首款AI强化的低温CMOS量子测控芯片。 【仪表网 研发快讯】近日，北京量子信息科学研究院(以下简称“量子院”)量子接口器件与系统研究团队携手清华大学集成电路学院、上海交通大学集成电路学院相关研究人员，秉持“量智融合”发展理念，围绕规模化量子计算核 ...
OFweek维科网

【2020 VLSI】先进CMOS工艺一览

2020年6月15日至18日（美国时间，第二天为日本时间）举行了“ 2020年技术与电路专题讨论会（VLSI 2020年专题讨论会）”，但实际上所有的讲座录了视频，并可付费观看至2020年8月底。 如果像过去那样在酒店场所召开会议，则您只能参加众多平行会议中的一个会议。
TechRepublic

Low Power VLSI CMOS Design by DCG Technique

The demand for power-sensitive design has grown significantly in recent years due to tremendous growth in portable applications. Consequently, the need for power efficient design techniques has grown ...
TechRepublic

Intel’s 45nm CMOS Technology Performance Parameters in VLSI Design

The trend of CMOS technology improvement continues to be driven by the need to integrate more functions within a given silicon area. In this paper, the authors describe Intel’s 45nm technology ...
Hackaday

How CMOS Works: MOSFETs, JFETs, IGFETS And More

CMOS opened the door for many if not most of the properties needed for today’s highly integrated circuits and low power portable and mobile devices. This really couldn’t happen until the speeds and ...
Electronics Weekly

VLSI Symposium: 7bit 150Gsample/s DAC on 5nm CMOS

Imec built a 7bit 150Gsample/s digital to analogue converter using 5nm finfet CMOS. Revealed at the Symposium on VLSI Technology and Circuits in Kyoto, it achieves data rates of up to 300 Gbit/s using ...