Memory-efficient, multithreaded engines utilize available server cores to speed up automatic test pattern generation (ATPG) and silicon diagnosis Twenty-five percent fewer test patterns reduce test ...

New semiconductor technologies like FinFETs are giving rise to new types of fault effects not covered by standard stuck-at and at-speed tests. Automatic test pattern generation (ATPG) tools perform ...

Today's chip designs are getting smaller and bigger. Feature sizes are moving into nanometer geometries, and gate counts are pushing towards the 100M gate mark. Semiconductor companies creating these ...

TetraMAX II ATPG reduced test generation runtime by an order of magnitude, from an overnight run to less than one hour, while producing 50 percent fewer patterns DecaWave met their silicon test time ...

There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...

Small geometries have projected IC technology into an era where test has become a crucial part in the chip design process and have introduced new challenges needing solutions that use already ...

Today’s huge, deep submicron system on chip (SoC) designs present many challenges at every stage of development, from architectural exploration to volume production. This post addresses the specific ...

Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.

Growing pressure to improve IC reliability in safety- and mission-critical applications is fueling demand for custom automated test pattern generation (ATPG) to detect small timing delays, and for ...